Lets design an audio amplifier, using discrete transistors, in order to amplify the low level output of a device. For example the output of the demodulation stage of radio receiver, a microphone, etc. First thing all. The requirements for our amplifier:

- 9 volts supply voltage.
- Voltage gain (preamplifier stage) of at least 100.
- Driving a small 16 Ohm speaker with a voltage of 5 Vp-p.
- Bandwidth from 50 Hz to 22 kHz.

*The following is intended as an educational aid and not a professional effort.*

__Preamplifier Stage__.

__Preamplifier Stage__.

First of all, now that we have established our requirements, we must take some decisions for our amplifier. We need a preamplifier with gain of at least 100. The big gain we need drives as to the conclusion that the preamplifier stage will be a **Common Emitter** (**CE**) amplifier. Bellow we can see the preamplifier circuit.

The transistor, **Q1**, we are going to use is the **BC547B**. We will consider that this transistor has a current gain **β** (**H _{fe}** or

**beta**) equal to 100 (worst case scenario). The Collector-Emitter voltage of BC547Β, when saturated is V

_{CE(SAT)}=0,2 volts (for a specific collector current). The Base-Emitter voltage for BC547Β is V

_{BE}=0,6 volts. All the above numbers comes directly form BC547B’s datasheet.

We must calculate the values of **R1**,**R2**,**RC**,**RE** and **C1**. C1 controls the upper side of the bandwidth. Cin and Cout are used to couple in the ac signal. A value of 100 μF is a good enough value for those capacitors. The CE capacitor grounds the ac signal and increases the ac gain of the amplifier. Also controls the low side of the bandwidth. Generally speaking we need this capacitor as large as possible. For our needs, a value of 220 μF is good enough.

Before we start calculating values we must make a decision for the Collector current, **I _{C}**. BC547Β has a max collector current of 100 mA. For continuous operation we should use a collector current 10 times lower of the max collector current. We could select 10 mA. Practically speaking, at 10 mA the electrical characteristics for the BC547Β transistor are not so great (there are also some noise issues with biasing at 10 mA). For example V

_{CE(SAT)}is 0,6 volts from 0,2 volts. From the datasheet for the BC547B we can see that for a 2 mA collector current is behaves quite nicely. So we are going to select a Collector current of 2 mA.

We need a gain of 100. The voltage gain of Common Emitter aplifier is dictated from the following equation:

We will say that we need the gain Α, at **least** 100 and the collector current Ι_{C} equal to 2 mA. To be certain for our design, we are going to say that we need our gain to be larger that 100 (Α>100). So we can now calculate:

So, if we use a Collector resistor, **R _{C}**, of 1250 Ohm the voltage gain will equal to 100. Due to losses I know that the value of the resistor must be bigger. So, we are going to select a 1500 Ohm resistor (available a Ε12 resistors series).

We need the operating point (Q-point) of the transistor to the middle of the operating point curve, in order the ac voltage to swing without causing the transistor to enter the saturation or the cutting point regions. So we need a collector voltage of 4,5 volts (half of the supply voltage). So **V _{CE}=4,5 volts**. Now we can calculate the resistor we must place to the Emitter (RE). For the circuit, applies:

###### Did you spot the oversight/”error” to the calculations above?

We will select a value of **820 Ohms** (Ε12 resistors series, I don’t have a 750 Ohm (Ε24 series) resistor).

Let’s now calculate **R1**, **R2** resistors, composing the voltage divider for biasing the transistor Base. *Generally, we need the current through R2 ten (10) times (or an order of magnitude) bigger that the base current ( Ι_{B})*. We need this in order to achieve a stable voltage divider, that leads to a stable operating point for the transistor. The current through R1 will be eleven (11) time the base current (one part for the base current and the remaining ten parts through R2).

We know for the base current that:

For the base voltage we know that:

The 0,6 volts (**V _{BE}**) is the base emitter junction forward voltage.

For R2 we know that:

R2=10,5 kOhm. We are going to choose **R2=10 kOhm** (Ε12 resistors series).

For R1 we know that:

We are going to choose **R1=27 kOhm** (Ε12 resistors series). We are selecting the lower closest value in order to compensate for the increase of the RE resistor.

So far we have calculated:

**R1=27 kOhm**,** R2=10 kOhm**, **RC=1500 Ohm**, **RE=820 Ohm**. We must calculate the **C1** capacitor.

C1 capacitor is parallel to the collector resistor. This means that for the ac current the resistance (impedance) of the Collector (let’s say **Ζ _{C}**) will depend upon the ac signal frequency. But when the Collector resistance changes, the gain (A) changes also. We need an upper limit of 22 kHz for the bandwidth (the human ear can’t hear frequencies above 22 kHz). This mean that the output voltage must be 0,707 of the input voltage, for an input frequency of 22 kHz.

In order to reduce the gain by 3 db (or 0,707) we must reduce the collector impedance **R _{CZ}** by 0.707.

If the capacitor impedance is **X _{C}**, from two resistors in parallel connection, and the capacitor impedance:

From the impedance for a capacitor:

We are going ti select a 5 nF witch is the closest value available for me.

By calculating C1 we completed our design for the amplifier.

With the help of the program **LTSpice** we will simulate the circuit we designed. The voltage source Vmic has an output of 1 mVolt peak and a frequency of 1 kHz.

To the picture above we can see the output voltage, for an input voltage of 1 mVolt peak. This is 105 mVolts peak. This mean that the gain is **105**. Our requirement was a voltage gain of 100. So, this what we wanted.

Lat’s see the bandwidth now.

With the term bandwidth we mean the space between two frequencies (low and high) that the gain reduces by a factor of 0,707 of the output voltage.

To the above picture we can see the output for frequencies from 10 Hz to 100 kHz. We are looking for frequencies that the gain reduces by 0,707 of the output. The maximum output is 40,46 db. We need the position of -3 db less.

From the pointers to the diagram we can see that the -3 db point for the low frequency is at **56 Hz**. For the high frequency the -3 db point is at **25 kHz**. He had a requirement of 50 Hz to 22 kHz. 56 Hz to 25 kHz is really good.

We have now completed the design of our preamplifier.

To be continued…